Modeling of the Threshold Voltage Shift Dependency on the Drain Bias in Amorphous Silicon Thin-Film Transistors in Active Matrix Organic Light-Emitting Diode Displays

A theoretical model to interpret appearances of the threshold voltage shift in hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFT’s) is developed to better understand the instability of a-Si:H TFT’s for the driving transistors in active matrix organic light-emitting diode (AMOLED) displays. This model assumes that the defect creation is proportional to the carrier density in a-Si:H, leading to the defect density that varies along the channel depending on the bias conditions. The model interprets a threshold voltage shift dependency on the drain stress bias. The threshold voltage shift stressed with a gate bias in the saturation condition will be 2/3 of that stressed in the linear region even with the same gate bias stress, and can be even smaller when stressed in deeper saturation region.